The stacking of the boards is the basis for the overall system design of the PCB. If the laminate design is defective, it will ultimately affect the EMC performance of the whole machine. In general, the laminate design mainly follows two rules:
1. Each trace layer must have an adjacent reference layer (power or ground);
2. The adjacent main power plane and ground plane should be kept at a minimum spacing to provide a large coupling capacitance; the following is a stack from two to ten layers:
2.1 Stacking of single and double panels; for two layers, there is no problem of lamination due to the small number of layers. The control of EMI radiation is mainly considered from the wiring and layout; the electromagnetic compatibility problems of single-layer boards and double-layer boards are becoming more and more prominent. The main reason for this phenomenon is that the signal loop area is too large, which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. The easiest way to improve the electromagnetic compatibility of the line is to reduce the loop area of ​​the critical signal. Key signals: From the perspective of electromagnetic compatibility, the key signals mainly refer to signals that generate stronger radiation and signals that are sensitive to the outside world. A signal capable of generating stronger radiation is typically a periodic signal, such as a low signal of a clock or address. Interference-sensitive signals are those with lower levels. Single and double-layer boards are usually used in low-frequency analog designs below 10 kHz: the power traces on the same layer are routed radially, and the sum of the lengths of the lines is minimized; when the power and ground lines are taken, they are close to each other; Place a ground wire on the edge of the critical signal line. This ground wire should be as close as possible to the signal line. This creates a smaller loop area and reduces the sensitivity of differential mode radiation to external disturbances. When a ground wire is added next to the signal line, a loop with the smallest area is formed, and the signal current will definitely take this loop instead of other ground paths. If it is a two-layer circuit board, you can lay a ground wire along the signal line on the other side of the circuit board, close to the signal line, and the line should be as wide as possible. The loop area thus formed is equal to the thickness of the board multiplied by the length of the signal line.
2.2 Layering of four-layer boards; recommended stacking method:
2.2.1 SIG-GND(PWR)-PWR (GND)-SIG;
2.2.2 GND-SIG(PWR)-SIG(PWR)-GND; For the above two laminate designs, the potential problem is for the traditional 1.6mm (62mil) board thickness.
The layer spacing will become very large, which is not only unfavorable for controlling impedance, interlayer coupling and shielding; in particular, the spacing between power supply layers is large, which reduces the board capacitance and is not conducive to filtering noise. For the first solution, it is usually applied to the case of more chips on the board. This solution can get better SI performance, not very good for EMI performance, mainly through routing and other details. Main note: The stratum is placed in the connected layer of the signal layer with the densest signal, which is beneficial to absorb and suppress radiation; increase the plate area and reflect the 20H rule. For the second solution, it is usually applied to a case where the chip density on the board is sufficiently low and there is a sufficient area around the chip (the required copper layer of the power supply is placed). In this solution, the outer layers of the PCB are all layers, and the middle two layers are signal/power layers. The power supply on the signal layer is routed with a wide line, which makes the path impedance of the power supply current low, and the impedance of the signal microstrip path is low, and the inner layer signal radiation can also be shielded through the outer layer. From the perspective of EMI control, this is the best 4-layer PCB structure available. The main note: the middle two layers of signal, power supply mixed layer spacing should be opened, the routing direction is vertical, to avoid crosstalk; appropriate control board area, reflecting the 20H rule; if you want to control the trace impedance, the above scheme must be very careful to trace Placed under the power and ground copper islands. In addition, the copper between the power supply or the ground plane should be interconnected as much as possible to ensure DC and low frequency connectivity.
2.3 Layers of six-layer boards; for designs with high chip density and high clock frequency, the design of the 6-layer board should be considered.
2.3.1 SIG-GND-SIG-PWR-GND-SIG; for this scheme, this layering scheme can obtain better signal integrity, the signal layer is adjacent to the ground plane, and the power layer and the ground plane are paired. The impedance of each trace layer can be well controlled, and both formations can absorb magnetic lines of force well. And in the case of complete power and ground conditions, it can provide a better return path for each signal layer. 2.3.2 GND-SIG-GND-PWR-SIG-GND; for this scheme, this scheme is only applicable to the case where the device density is not very high. This layer has all the advantages of the above layer, and such top layer and The ground plane of the bottom layer is relatively complete and can be used as a better shielding layer. It should be noted that the power layer should be close to the layer of the non-main component surface because the bottom plane will be more complete. Therefore, EMI performance is better than the first option. Summary: For a six-layer board solution, the spacing between the power plane and the ground plane should be minimized to achieve good power and ground coupling. However, although the plate thickness of 62 mils is reduced, it is not easy to control the distance between the main power source and the ground layer to be small. Comparing the first scheme with the second scheme, the cost of the second scheme is greatly increased. Therefore, we usually choose the first option when we stack. Designed to follow the 20H rules and mirror layer rules
2.4 Layers of eight-layer boards; eight-layer boards usually use the following three layers
2.4.1 This is not a good lamination method due to poor electromagnetic absorption capability and large power supply impedance. Its structure is as follows: 1 Signal 1 component surface, microstrip trace layer 2 Signal 2 internal microstrip trace layer, better trace layer (X direction) 3 Ground 4 Signal 3 stripline trace layer, better Trace layer (Y direction) 5 Signal 4 Stripline trace layer 6 Power 7 Signal 5 Internal microstrip trace layer 8 Signal 6 Microstrip trace layer
2.4.2 is a variant of the third layering method . Due to the addition of the reference layer and better EMI performance, the characteristic impedance of each signal layer can well control the 1 Signal 1 component surface and the microstrip trace layer. Trace Layer 2 Ground Formation, good electromagnetic wave absorption capacity 3 Signal 2 Stripline trace layer, good trace layer 4 Power power layer, and excellent electromagnetic absorption with the underlying formation 5 Ground Formation 6 Signal 3 Line trace layer, good trace layer 7 Power formation, with large power supply impedance 8 Signal 4 microstrip trace layer, good trace layer
2.4.3 Optimal lamination mode, due to the use of a multi-layered reference plane with very good geomagnetic absorption capability. 1 Signal 1 component surface, microstrip trace layer, good trace layer 2 Ground formation, better electromagnetic wave absorption capacity 3 Signal 2 stripline trace layer, good trace layer 4 Power power layer, and below The formation constitutes excellent electromagnetic absorption. 5 Ground Formation 6 Signal 3 Stripline trace layer, good trace layer 7 Ground formation, good electromagnetic wave absorption capacity 8 Signal 4 Microstrip trace layer, good trace layer
2.5 Summary
How to choose the design of several layers and how to use the laminate, according to the number of signal networks on the board, device density, PIN density, signal frequency, board size and many other factors. We must consider these factors comprehensively. The greater the number of signal networks, the greater the density of the device, the greater the PIN density, and the higher the frequency of the signal, the design should be as multi-layered as possible. For good EMI performance, it is best to ensure that each signal layer has its own reference layer.
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